Jose Bastos
Curriculum vitae
Jose Bastos obtained a degree in Applied Physics
and Electronics in 1984 from the Physics Department, University of Porto,
Portugal. In 1988 he was a visiting student at the Technical University of Trondheim,
Norway, specializing in Electronic Instrumentation. From 1985 until
1992 he was a research assistant at the Physics Dept. of the University
of Porto. From March 1992 to May 1988 he was a PhD student at the Katholieke Universiteit Leuven
Electrotechnical Dept. The title of the Ph. D. dissertation was “Characterization
of MOS Transistor Mismatch for Analog Design”. The thesis advisors were
Prof. M. Steyaert
and Prof. W. Sansen.
He is since September 1998 Assistant Professor at the Department of Electronic Engineering
and Informatics of the University of Algarve.
Main research interests
- Microelectronics
- Analog Integrated Circuit Design
- Transistor Modelling and Parameter Extraction
- Data Converters
- Organic Transistor Circuit Design
Current activities
Jose Bastos is currently Assistant Professor at the Department of Electronic Engineering
and Informatics of the University of Algarve. Apart from teaching
(electronic circuit design), his current research activities include:
Oversampled Digital to Analog Converters. The use
of mismatch shaping algorithms in multibit Delta-Sigma digital to analog
converters allows to bypass the limits in linearity and spectral purity
imposed by technology limits (component mismatch) in Nyquist rate DACs. The
research involves the study of algoritms that optimize the tradeoff between
resolution, speed, and circuit complexity..
Organic Transistor Circuit Design. Organic thin
film transistors are gaining attention as a technology that eneable electronic
circuits to be fabricated using low cost processing on plastic substrates.
The research involves the design of analog and digital bulding blocks
to be used as sensors and sensor interfaces in this new technology.
Publications
- J. Bastos, M. Steyaert, S. Finco, W.
Sansen,
"Low Impedance CMOS Input Cell",
Proc. IX SBMICRO, August 1994, pp. 766-769.
- M. Steyaert, J. Bastos, R. Roovers, P. Kinget,
W. Sansen, B. Graindourze, A. Pergot, Er. Janssens,
"Threshold Voltage
Mismatch in Short-Channel MOS Transistors",
Electronics Letters, September 1994, vol. 18, pp.
1546-1548.
- J. Bastos, M. Steyaert, R. Roovers, P. Kinget, W. Sansen,
B. Graindourze, A. Pergot, Er. Janssens,
"Mismatch
Characterization of Small Size MOS Transistors",
Proc. IEEE Int. Conference on Microelectronic Test Structures,
March 1995, pp. 271-276.
- A. Pergot, B. Graindourze, Er. Janssens, J. Bastos, M.
Steyaert, R. Roovers, P. Kinget, W. Sansen,
"Statistics
for Matching",
Proc. IEEE Int. Conference on Microelectronic Test Structures,
March 1995, pp. 271-276.
- J. Bastos, M. Steyaert, B. Graindourze, W. Sansen,
"Matching
of MOS Transistors with Different Layout Styles",
Proc. IEEE Int. Conference on Microelectronic Test Structures,
March 1996, pp. 17-18.
- J. Bastos, M. Steyaert, B. Graindourze, W. Sansen,
"Influence
of Die Attachment on MOS Transistor Matching",
Proc. IEEE Int. Conference on Microelectronic Test Structures,
March 1996, pp. 27-31.
- J. Bastos, M. Steyaert, W. Sansen,
"A High
Yield 12-bit 250-MS/s CMOS D/A Converter",
Proc. IEEE Custom Integrated Circuits Conference,
May 1996, pp. 20.6.1-20.6.4.
- J. Bastos, M. Steyaert, A. Pergoot, W. Sansen,
"Mismatch Characterization of Submicron MOS Transistors",
Analog Integrated Circuits and Signal Processing ,
February 1997, pp. 95-106.
- J. Bastos, M. Steyaert, A. Pergoot, W. Sansen,
"Influence of Die
Attachment on MOS Transistor Matching",
IEEE Transactions on Semiconductor Manufacturing,
May 1997, pp. 209-218.
- M. Steyaert, V. Peluso, J. Bastos, P. Kinget, and W. Sansen,
"Custom Analog
Low-Power Design: the Problem of Low Voltage and Mismatch",
Proceedings IEEE 1996 Custom Integrated Circuits Conference (CICC),
pp. 285-292, May 1997.
- A. Marques, J. Bastos, A. Van den Bosch, J. Vandenbussche,
M. Steyaert, and W. Sansen,
"A 12-bit Accuracy
300 MS/s Update Rate CMOS DAC",
IEEE International Solid-State Circuits Conference (ISSCC), pp. 216-217,
Feb. 1998.
- A. Van den Bosch, M. Borremans, J. Vandenbussche, A. Marques,
J. Bastos, M. Steyaert, and W. Sansen,
"A 12 bit 200
MHz Low Glitch CMOS D/A Converter",
Proceedings IEEE Custom Integrated Circuit Conference 1998 (CICC),
pp. 249-252, May 1998.
- A. Marques, J. Bastos, M. Steyaert, W. Sansen,
"A current steering
architecture for 12-bit high-speed D/A converters",
IEEE International Conference on Electronics, Circuits and Systems,
Volume 1, pp. 23-26, Sept. 1998.
- J. Bastos, A. Marques, M. Steyaert, and W. Sansen,
"A 12-Bit
Intrinsic Accuracy High-Speed CMOS DAC",
IEEE Journal of Solid-State Circuits, pp. 1959-1969, Dec. 1998.
You can download my PhD thesis on “Characterization of MOS Transistor
Mismatch for Analog Design” from here.
If you want to contact Jose Bastos :
Jose Bastos
DEEI - FCT
FAculdade de Ciências e Tecnologia
CAmpus de Gambelas
p-8000 FARO
Portugal
Tel : +351-289800900 extension 7748
Fax : +351-289819403
email : jbastos@ualg.pt
PGP public key
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